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ÀÎÅÚ »õ·Î¿î ½ºÅ×ÇÎÀÇ ÇÁ·Î¼¼¼ ¼Ò°³...
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Á¶È¸ :
1921 ,
2003/03/02 21:37 |
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Ãâó : http://www.xbitlabs.com/news/story.html?id=1046258347
ÀÎÅÚÀÌ »õ·Î¿î ½ºÅÜ D-1À» ¼Ò°³Çß´Ù°í ÇÕ´Ï´Ù.
* CPUID will change from 0F27h for C-1 step to 0F29h for D-1 step;
* Multiple VIDs are 1.475V, 1.5V, and 1.525V for up to 2.80GHz;
* Multiple VIDs are 1.475V, 1.5V, 1.525V and 1.55V for 3.06 GHz;
* Multiple VID will have one new s-spec and material master number per frequency;
* Electrical, mechanical, and thermal specification qualification required;
* Specifications stay the same and are within the designated FMB guidelines;
* Impedance pin functionality added (pin AE26) to support higher system bus (800MHz) platforms. No impact to existing platforms.
º°´Ù¸¥ Å« ´Ù¸¥Á¡Àº ¾ø´Â µí... FSB800 ¸ðµ¨ÀÎ µí ÇÕ´Ï´Ù.
4¿ù ÇϹݱ⿡ »õ·Î¿î Á¦Ç°ÀÌ º¸Àϼöµµ ÀÖÀ»°ÍÀ̶ó´Â À̾߱⵵ ÀÖ½À´Ï´Ù.
Âü°íÇϽñæ...
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