IA-32e°¡ x86-64ÀÇ ´Ù¸¥ Á¡...
 athlon88 (ID)
 Á¶È¸ : 2500 , 2004/03/04 01:54

Ãâó : http://www.ussg.iu.edu/hypermail/linux/kernel/0402.3/0276.html

 

IA-32e and AMD64. The software visible ones are:

Fast system calls:
Syscall/sysret is supported only in 64-bit mode (not in compatibility
mode). Sysenter/Sysexit is supported in both 64-bit and compatible
mode.

CPUID:
If you look at Table 2-8 of Volume 1, you will find IA-32e specific
things,
including, GenuineIntel, HT, SSE3, monitor/mwait, Intel Enhanced
SpeedStep,
and cmpxchg16b.

The function 8000_0001h doesn't duplicate standard-feature bits from
function 1 in EDX. It sets only the new features that are implemented.

MSRs:
Not all MSRs are architectural, and IA-32e does not implement SYSCFG,
TOP_MEM, TOP_MEM2, for example. MSR usage should be vendor specific
and
be guarded with CPUID.Model

Fast-FXSAVE/FXRSTOR:
IA-32e always saves all of the FP state on FXSAVE/FXRSTOR. Does not
support FXSAVE/FXRSTOR with reduced FP state.

Microcode Update:
IA-32e supports microcode update as the 32-bit mode does, as you
already
found the discussions in the mailing list.

NX (No-Execute) bit:
Initial implementation will not support the NX bit.

BSF/BSR when source is 0 & operand size is 32:
In 64-bit mode, the processor sets ZF, and the upper 32 bits of
the destination are undefined. Should always check the ZF or do not
use
32-bit operand size.

Near branch with 66H prefix:
As documented in PRM the behavior is implementation specific and
should
avoid using 66H prefix on near branches.

Not supported in IA-32e
=======================
3DNow instructions (including prefecthw or prefetch with the opcode 0f
0d)

 

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