°£´ÜÈ÷ º¸´Â DDR2 Ư¡ =_=;;
 athlon88 (ID)
 Á¶È¸ : 2429 , 2004/05/21 07:25

Ãâó : http://www.xbitlabs.com/articles/memory/display/ddr2_7.html

 

¾Æ·¡´Â Ư¡ Å×À̺íÀÔ´Ï´Ù. ÀÚ¼¼ÇÑ ³»¿ëÀº À§ Ãâó¸¦ È®ÀÎÇÏ½Ã¸é µË´Ï´Ù. »ó¼¼ÇÏ°Ô µÑÀÇ ´Ù¸¥Á¡°ú Ư¡À» ¼³¸íÇÏ°í ÀÖ½À´Ï´Ù.

 

 

 

DDR

DDR-II

Data transfer rate  

200/266/333/400 Mbps* 

400/533/(667) Mbps* 

Bus frequency

100/133/166/200 MHz

200/266/(333) MHz

Memory frequency

100/133/166/200 MHz

100/133/(166) MHz

Batch reading size

2/4/8

4/8**

Data Strobe

Single DQS

Differential Strobe: DQS, /DQS***

CAS Latency

1.5, 2, 2.5

3+, 4, 5

Write Latency

1T

Read Latency-1

* Megabit/pin/sec
** The specification originally described a packet length of 4QW, but later added the 8QW mode, proposed by Intel and Samsung.(8QW ¸ðµå´Â ÀÎÅÚ°ú »ï¼º¿¡ Á¦¾È¿¡ ÀÇÇؼ­ Ãß°¡µÈ ºÎºÐÀÔ´Ï´Ù. ±âº»Àº 4QWÀÔ´Ï´Ù.)

 

DDR2ÀÇ ¸Þ¸ð¸® ·¹ÀÌÅϽð¡ Áõ°¡ÇÏ´Â ÀÌÀ¯´Â ´ÙÀ½ ¹ðÅ©ÀÇ ÃʱâÈ­ ¹®Á¦¸¦ ÇØ°áÇϱâ À§ÇØ ¾î¿ ¼ö ¾ø´Â ºÎºÐÀ̶ó°í ÇÕ´Ï´Ù.

 

À§ÀÇ ¾²±â ·¹ÀÌÅϽÃ(Write Latency)´Â DDR2ÀÇ °æ¿ì Àб⠷¹ÀÌÅϽÃ(CAS Latency)-1ÀÇ °ªÀ» °¡Áø´Ù´Â ´ÜÁ¡µµ º¸ÀÔ´Ï´Ù.

 

 

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